Reducing data dependent jitter utilising adaptive FIR pre-emphasis in 0.18 μm CMOS

Keyphrases

• Data-dependent Jitter 100%
• High-speed Serial Link 66%
• Pre-emphasis Technique 66%
• Link Data 33%
• SPICE Simulation 33%
• Jitter Reduction 33%
• CMOS Implementation 33%
• Backplane 33%
• FR-4 33%
• Integrated Circuit Layout 33%
• Point-to-point Links 33%

Engineering

• Data Rate 100%
• Simulation Result 50%
• End-Users 50%
• Simulated Data 50%
• SPICE 50%
• Integrated Circuit Layout 50%