Pixel circuit optimization for imaging applications using integrated circuit technologies

Jonan Venter; Saurabh Sinha

doi:10.1109/COMCAS.2011.6105804

Pixel circuit optimization for imaging applications using integrated circuit technologies

Jonan Venter, Saurabh Sinha

University of Pretoria

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

1 Citation (Scopus)

Abstract

The most commonly used pixel structure in Integrated Circuit (IC) technologies is the three-transistor pixel structure (3T). This structure consists of a pixel, a reset transistor, as source follower and a pixel select transistor. It has been shown that this structure exhibits the best performance and reliability, although no real in-depth analysis has been previously presented. In this paper, a thorough analysis and optimization of this structure has been done. Simulation results depicting this optimization for the AMS S35D4M5 process is provided to support the mathematical contribution of this paper.

Original language	English
Title of host publication	2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011
DOIs	https://doi.org/10.1109/COMCAS.2011.6105804
Publication status	Published - 2011
Externally published	Yes
Event	2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011 - Tel Aviv, Israel Duration: 7 Nov 2011 → 9 Nov 2011

Publication series

Name	2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011

Conference

Conference	2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011
Country/Territory	Israel
City	Tel Aviv
Period	7/11/11 → 9/11/11

Keywords

3T
BJT
CMOS
HBT
dark current
photon current
pixel
threshold voltage

ASJC Scopus subject areas

Hardware and Architecture
Electrical and Electronic Engineering

Access to Document

10.1109/COMCAS.2011.6105804

Cite this

Venter, J., & Sinha, S. (2011). Pixel circuit optimization for imaging applications using integrated circuit technologies. In 2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011 Article 6105804 (2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011). https://doi.org/10.1109/COMCAS.2011.6105804

@inproceedings{4b428c50e7084a64adb6f4d9994043c0,

title = "Pixel circuit optimization for imaging applications using integrated circuit technologies",

abstract = "The most commonly used pixel structure in Integrated Circuit (IC) technologies is the three-transistor pixel structure (3T). This structure consists of a pixel, a reset transistor, as source follower and a pixel select transistor. It has been shown that this structure exhibits the best performance and reliability, although no real in-depth analysis has been previously presented. In this paper, a thorough analysis and optimization of this structure has been done. Simulation results depicting this optimization for the AMS S35D4M5 process is provided to support the mathematical contribution of this paper.",

keywords = "3T, BJT, CMOS, HBT, dark current, photon current, pixel, threshold voltage",

author = "Jonan Venter and Saurabh Sinha",

year = "2011",

doi = "10.1109/COMCAS.2011.6105804",

language = "English",

isbn = "9781457716928",

series = "2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011",

booktitle = "2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011",

note = "2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011 ; Conference date: 07-11-2011 Through 09-11-2011",

}

Venter, J & Sinha, S 2011, Pixel circuit optimization for imaging applications using integrated circuit technologies. in 2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011., 6105804, 2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011, 2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011, Tel Aviv, Israel, 7/11/11. https://doi.org/10.1109/COMCAS.2011.6105804

Pixel circuit optimization for imaging applications using integrated circuit technologies. / Venter, Jonan ; Sinha, Saurabh.
2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011. 2011. 6105804 (2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Pixel circuit optimization for imaging applications using integrated circuit technologies

AU - Venter, Jonan

AU - Sinha, Saurabh

PY - 2011

Y1 - 2011

N2 - The most commonly used pixel structure in Integrated Circuit (IC) technologies is the three-transistor pixel structure (3T). This structure consists of a pixel, a reset transistor, as source follower and a pixel select transistor. It has been shown that this structure exhibits the best performance and reliability, although no real in-depth analysis has been previously presented. In this paper, a thorough analysis and optimization of this structure has been done. Simulation results depicting this optimization for the AMS S35D4M5 process is provided to support the mathematical contribution of this paper.

AB - The most commonly used pixel structure in Integrated Circuit (IC) technologies is the three-transistor pixel structure (3T). This structure consists of a pixel, a reset transistor, as source follower and a pixel select transistor. It has been shown that this structure exhibits the best performance and reliability, although no real in-depth analysis has been previously presented. In this paper, a thorough analysis and optimization of this structure has been done. Simulation results depicting this optimization for the AMS S35D4M5 process is provided to support the mathematical contribution of this paper.

KW - 3T

KW - BJT

KW - CMOS

KW - HBT

KW - dark current

KW - photon current

KW - pixel

KW - threshold voltage

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U2 - 10.1109/COMCAS.2011.6105804

DO - 10.1109/COMCAS.2011.6105804

M3 - Conference contribution

AN - SCOPUS:84855797078

SN - 9781457716928

T3 - 2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011

BT - 2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011

T2 - 2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011

Y2 - 7 November 2011 through 9 November 2011

ER -

Venter J , Sinha S. Pixel circuit optimization for imaging applications using integrated circuit technologies. In 2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011. 2011. 6105804. (2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011). doi: 10.1109/COMCAS.2011.6105804

Pixel circuit optimization for imaging applications using integrated circuit technologies

Abstract

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Keywords

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