Pixel circuit optimization for imaging applications using integrated circuit technologies

Jonan Venter, Saurabh Sinha

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

The most commonly used pixel structure in Integrated Circuit (IC) technologies is the three-transistor pixel structure (3T). This structure consists of a pixel, a reset transistor, as source follower and a pixel select transistor. It has been shown that this structure exhibits the best performance and reliability, although no real in-depth analysis has been previously presented. In this paper, a thorough analysis and optimization of this structure has been done. Simulation results depicting this optimization for the AMS S35D4M5 process is provided to support the mathematical contribution of this paper.

Original languageEnglish
Title of host publication2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011
DOIs
Publication statusPublished - 2011
Externally publishedYes
Event2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011 - Tel Aviv, Israel
Duration: 7 Nov 20119 Nov 2011

Publication series

Name2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011

Conference

Conference2011 IEEE International Conference on Microwaves, Communications, Antennas and Electronic Systems, COMCAS 2011
Country/TerritoryIsrael
CityTel Aviv
Period7/11/119/11/11

Keywords

  • 3T
  • BJT
  • CMOS
  • HBT
  • dark current
  • photon current
  • pixel
  • threshold voltage

ASJC Scopus subject areas

  • Hardware and Architecture
  • Electrical and Electronic Engineering

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