Parasitic capacitances in double gate MOSFET

Engineering

• Metal-Oxide-Semiconductor Field-Effect Transistor 100%
• Capacitive 100%
• Parasitic Capacitance 100%
• Logic Gate 66%
• Dynamic Behavior 33%
• Switching Speed 33%
• Delay Estimation 33%
• Output Node 33%
• And Logic Gate 33%
• Physical Structure 33%

Keyphrases

• Capacitive Load 33%
• Delay Estimation 33%
• Gate Delay 33%
• Mask Layout 33%
• Intrinsic Delay 33%