Optimization of drain current and voltage characteristics for DP4T double-gate RF CMOS switch at 45-nm technology
- Viranjay M. Srivastava
- , K. S. Yadav
- , G. Singh
- Jaypee University of Information Technology
- CSIR - Central Electronics Engineering Research Institute
Research output: Contribution to journal › Conference article › peer-review
3
Citations
(Scopus)