Double-Pole Four-Throw RF CMOS switch design with double-gate transistors

Viranjay M. Srivastava, K. S. Yadav, G. Singh

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

12 Citations (Scopus)

Abstract

In this paper, we have explored the design features of a Double-Pole Four-Throw (DP4T) RF CMOS switch with use of a novel Vertical Slit Field Effect Transistor (VSFET). This proposed switch circuit uses the double-gate which minimizes the number of transistors and increases the logic density of the transistor per unit area as compare to simple switch. These double gates are independently controlled. This will provide a switch with a drive circuit that free from signal propagation delay and additional voltage power supply. Further, main objective is to provide a plurality of such switches arranged in a densely configured switch array, where the power and circuit area is reduced as compared to a tied gate configuration.

Original languageEnglish
Title of host publicationProceedings of the 2010 Annual IEEE India Conference
Subtitle of host publicationGreen Energy, Computing and Communication, INDICON 2010
DOIs
Publication statusPublished - 2010
Externally publishedYes
Event2010 Annual IEEE India Conference: Green Energy, Computing and Communication, INDICON 2010 - Kolkata, India
Duration: 17 Dec 201019 Dec 2010

Publication series

NameProceedings of the 2010 Annual IEEE India Conference: Green Energy, Computing and Communication, INDICON 2010

Conference

Conference2010 Annual IEEE India Conference: Green Energy, Computing and Communication, INDICON 2010
Country/TerritoryIndia
CityKolkata
Period17/12/1019/12/10

Keywords

  • CMOS
  • CMOS Switch
  • DP4T Switch
  • Double-gate MOSFET
  • Independent Gate Configuration
  • Power
  • RF Switch
  • Tied Gate Configuration
  • VLSI
  • VSFET

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Renewable Energy, Sustainability and the Environment

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