Design of Double-Gate MOSFET

Viranjay M. Srivastava, Ghanshyam Singh

Research output: Chapter in Book/Report/Conference proceedingChapterpeer-review


Recent progress to scale down the transistors to smaller dimensions provides the faster transistors, as well as lowers the effective density in terms of transistors area. The transistor scaling necessitates the integration of new device structures. The Double-Gate (DG) MOSFETs are example of this, which are capable for nanoscale integrated circuits due to their enhanced scalability compared to the bulk or Si-CMOS [1–5]. However, the better scalability can be achieved by introduction of a second gate at the other side of the body of transistor resulting in the double-gate structure. Due to excellent control of the short channel effects, double-gate devices have emerged as the device of choice for circuit design in sub-50 nm and below regime [6]. The low subthreshold leakage and higher ON-current in double-gate devices make them suitable for circuit design in sub-50 nm regime [7–10]. However, isolated or independent gate option can be useful for low power and mixed signal applications [11–15].

Original languageEnglish
Title of host publicationAnalog Circuits and Signal Processing
Number of pages39
Publication statusPublished - 2014
Externally publishedYes

Publication series

NameAnalog Circuits and Signal Processing
ISSN (Print)1872-082X
ISSN (Electronic)2197-1854


  • Back Gate
  • Short Channel Effect
  • Subthreshold Leakage
  • Subthreshold Swing
  • Threshold Voltage

ASJC Scopus subject areas

  • Electrical and Electronic Engineering
  • Information Systems
  • Signal Processing


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