@inproceedings{c0400205541d4d4a84126d11c3bc115a,
title = "Design methodology for a CMOS based power amplifier deploying a passive inductor",
abstract = "This paper presents the design methodology of an integrated power amplifier (PA), and coins the methodology as a software routine: for a given set of PA specifications, CMOS process parameters, the routine computes the passive component values for a Class-E based PA. The routine includes the matching network for standard impedance loads. The program also provides its user with a spiral inductor calculator, which can be used to determine inductance and parasitic values for an integrated square planar spiral inductor. The same tool has the ability to extract SPICE (tSPICE) netlist of inductor geometry, which can be used in the post-layout simulations of the PA. Operation of the program was demonstrated by simulations in AMS 0.35 μm single-supply process for a 10 dBm, 2.4 GHz PA design.",
keywords = "Class-E amplifier, Impedance matching, Power amplifier, SPICE netlist, Spiral inductor",
author = "M. Bo{\v z}ani{\'c} and S. Sinha",
year = "2007",
doi = "10.1109/AFRCON.2007.4401587",
language = "English",
isbn = "142440987X",
series = "IEEE AFRICON Conference",
booktitle = "IEEE AFRICON 2007",
note = "IEEE AFRICON 2007 ; Conference date: 26-09-2007 Through 28-09-2007",
}