Design flow for a SiGe BiCMOS based power amplifier

Mladen Božanic, Saurabh Sinha, Monuko Du Plessis, Alexandru Müller

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

This paper presents a streamlined design flow for an integrated power amplifier. For a given set of amplifier specifications and BiCMOS process parameters, a software routine computes passive component values for a Class-E or Class-F based power amplifier. The routine includes a matching network for standard impedance loads. Spiral inductor search algorithm is used to generate inductors with Q-factors optimised at a desired frequency. Operation of the software routine is demonstrated by simulations in Austriamicrosystems 0.35 μm single-supply process for the 10 dBm, 2.4 GHz power amplifier design.

Original languageEnglish
Title of host publicationCAS 2009 Proceedings - 2009 International Semiconductor Conference
Pages311-314
Number of pages4
DOIs
Publication statusPublished - 2009
Externally publishedYes
Event2009 International Semiconductor Conference, CAS 2009 - Sinaia, Romania
Duration: 12 Oct 200914 Oct 2009

Publication series

NameProceedings of the International Semiconductor Conference, CAS
Volume1

Conference

Conference2009 International Semiconductor Conference, CAS 2009
Country/TerritoryRomania
CitySinaia
Period12/10/0914/10/09

Keywords

  • BiCMOS process
  • Class-E amplifier
  • Class-F amplifier
  • Impedance matching
  • SPICE netlist
  • Spiral inductor

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Condensed Matter Physics
  • Electrical and Electronic Engineering

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