Balanced truncation for time-delay systems via approximate gramians

Xiang Wang, Qing Wang, Zheng Zhang, Quan Chen, Ngai Wong

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

20 Citations (Scopus)

Abstract

In circuit simulation, when a large RLC network is connected with delay elements, such as transmission lines, the resulting system is a time-delay system (TDS). This paper presents a new model order reduction (MOR) scheme for TDSs with state time delays. It is the first time to reduce a TDS using balanced truncation. The Lyapunov-type equations for TDSs are derived, and an analysis of their computational complexity is presented. To reduce the computational cost, we approximate the controllability and observability Gramians in the frequency domain. The reduced-order models (ROMs) are then obtained by balancing and truncating the approximate Gramians. Numerical examples are presented to verify the accuracy and efficiency of the proposed algorithm.

Original languageEnglish
Title of host publication2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
Pages55-60
Number of pages6
DOIs
Publication statusPublished - 2011
Externally publishedYes
Event2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011 - Yokohama, Japan
Duration: 25 Jan 201128 Jan 2011

Publication series

NameProceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Conference

Conference2011 16th Asia and South Pacific Design Automation Conference, ASP-DAC 2011
Country/TerritoryJapan
CityYokohama
Period25/01/1128/01/11

ASJC Scopus subject areas

  • Computer Science Applications
  • Computer Graphics and Computer-Aided Design
  • Electrical and Electronic Engineering

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