An efficient approach to VLSI circuit partitioning using evolutionary algorithms

Dhiraj Sangwan, Seema Verma, Rajesh Kumar

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Citations (Scopus)

Abstract

Circuit Partitioning generally formulated as graph partitioning problem is an important step in physical design of circuits. The use of Evolutionary techniques is increasingly used to solve NP complete problems i.e. Applications for logic minimization and simulation heuristics. This paper explores the evolutionary approach of genetic algorithm and propose a hybrid technique involving the strengths of the existing techniques resulting in a better partitioning and placement of circuits. It can further be extended to the Hardware/Software boundary of algorithms and can be applied to real world physical design problems.

Original languageEnglish
Title of host publicationProceedings - 2014 6th International Conference on Computational Intelligence and Communication Networks, CICN 2014
PublisherInstitute of Electrical and Electronics Engineers Inc.
Pages925-929
Number of pages5
ISBN (Electronic)9781479969296
DOIs
Publication statusPublished - 23 Mar 2014
Externally publishedYes
Event2014 6th International Conference on Computational Intelligence and Communication Networks, CICN 2014 - Bhopal, India
Duration: 14 Nov 201416 Nov 2014

Publication series

NameProceedings - 2014 6th International Conference on Computational Intelligence and Communication Networks, CICN 2014

Conference

Conference2014 6th International Conference on Computational Intelligence and Communication Networks, CICN 2014
Country/TerritoryIndia
CityBhopal
Period14/11/1416/11/14

Keywords

  • Algorithm
  • Circuit Partitioning
  • Evolutionary Algorithm
  • Fiduccia Mattheyses Algorithm
  • Kernighan Lin
  • VLSI
  • optimization

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Artificial Intelligence

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