A bottom up approach for placement and compaction of standard modules in VLSI circuit

Dhiraj, Seema Verma, Rajesh Kumar

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

1 Citation (Scopus)

Abstract

A bottom up approach for floor planning using the method of composite block formation using Macro Modules is presented. The process involves a recursive technique of bounding rectangle formation after searching the solution space using various number of composite block elements. The algorithm is efficient enough to reduce the dead space in range of 85-99% and much quicker i.e. from 10 to 100 times faster as compared to standard iterative approaches to carryout floor planning in Electronic Design Automation tools.

Original languageEnglish
Title of host publicationProceedings of the 2013 International Conference on Advanced Electronic Systems, ICAES 2013
Pages133-137
Number of pages5
DOIs
Publication statusPublished - 2013
Externally publishedYes
Event2013 International Conference on Advanced Electronic Systems, ICAES 2013 - Pilani, India
Duration: 21 Sept 201323 Sept 2013

Publication series

NameProceedings of the 2013 International Conference on Advanced Electronic Systems, ICAES 2013

Conference

Conference2013 International Conference on Advanced Electronic Systems, ICAES 2013
Country/TerritoryIndia
CityPilani
Period21/09/1323/09/13

Keywords

  • Aspect ratio
  • Bead space
  • Electronic design automation
  • Non-slicing floor plan
  • Recursive technique
  • Slicing floor plan

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

Fingerprint

Dive into the research topics of 'A bottom up approach for placement and compaction of standard modules in VLSI circuit'. Together they form a unique fingerprint.

Cite this